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In March 2024, at a ceremony in Dholera, Gujarat, the foundation stone was laid for what the Government of India described as the country's first large-scale semiconductor fabrication plant. Union Minister Ashwini Vaishnaw told the gathering that the first chip would roll out in December 2026 and that the plant would manufacture chips on the 28, 50 and 55 nanometre process nodes (DT Next, 2024). In July 2026, reporting by Bloomberg, later carried by Business Standard and other outlets, indicated that the facility would instead begin mainly with the 90 nanometre process, and that commercial operations would not start until mid-2028 (TrendForce, 2026).

This article treats that revision as a case study in the distance between national ambition and industrial execution. It addresses two questions. First, what does it mean, technically and economically, for India's first major fab to open on a legacy node? Second, is beginning with mature technology a defensible industrial strategy, or a quiet retreat from a publicly stated goal? The analysis draws on press reports, corporate announcements and official government documents. Some details remain unconfirmed by the companies concerned, so the conclusions offered here are reasoned interpretations rather than settled facts.

The Promise at Dholera

The Dholera project did not emerge in isolation. The India Semiconductor Mission (ISM) was approved by the Union Cabinet in December 2021 with an incentive framework of ₹76,000 crore, offering fiscal support of up to 50 per cent of project cost for fabrication and packaging facilities (Press Information Bureau [PIB], 2026). In February 2024, the government approved a proposal from Tata Electronics, a wholly owned subsidiary of Tata Sons, to build a fab in partnership with Taiwan's Powerchip Semiconductor Manufacturing Corporation (PSMC). Tata Electronics' announcement stated that the partnership gave access to a portfolio of leading-edge and mature nodes, including 28nm, 40nm, 55nm, 90nm and 110nm (Tata Electronics, 2024a). A definitive technology transfer agreement followed in September 2024 (Tata Electronics, 2024b).

The scale of the undertaking is considerable. Industry reporting places the investment at roughly ₹91,000 crore, or about US$11 billion, with planned capacity of up to 50,000 wafers a month at full build-out (DatacenterDynamics, n.d.). The company describes a 300 mm fab producing analogue and logic chips on technologies from 28nm to 110nm (Tata Electronics, n.d.). At the groundbreaking, Vaishnaw also stated that India would be among the top five chip ecosystems in the world by 2029 (DT Next, 2024).

An important nuance deserves recognition. Corporate documents consistently described a range of nodes rather than a single one. Yet public attention gravitated towards 28nm, the most advanced node in the range and the one named in the minister's remarks and, reportedly, in the Tata Sons annual report for the year ended March 2025 (TrendForce, 2026). The public narrative was therefore compressed around the most impressive figure in the portfolio. That compression is the root of the later controversy.

What the Reporting Revealed

According to Bloomberg's July 2026 report, as summarised by TrendForce (2026), the Dholera fab is preparing to rely mainly on the 90nm process. Minister Vaishnaw indicated that commercial operations are now expected in mid-2028, against the earlier target of end-2026. PSMC's spokesperson confirmed that the partnership covers multiple nodes, with 28nm being the most advanced, while Tata Electronics responded that the fab will produce chips from 28nm to 110nm and that the plan had always been to begin with 55nm and 90nm before introducing 28nm. The company added that 28nm would remain a key part of its offering (TrendForce, 2026).

These accounts are not necessarily contradictory. Table 1 sets the public positions side by side.

Table 1. Public positions on Dholera before and after July 2026

Dimension

Public position in 2024Position reported in July 2026

Opening nodes

28nm, 50nm and 55nm named at groundbreaking (DT Next, 2024)Mainly 90nm, with 55nm; Tata says this was always the plan (TrendForce, 2026)

Timeline

First chip in December 2026 (DT Next, 2024)Commercial operations in mid-2028 (TrendForce, 2026)

Node range

28nm to 110nm (Tata Electronics, 2024a)28nm to 110nm, with 28nm to follow (TrendForce, 2026)

A note on sourcing is appropriate. The original reporting is Bloomberg's, and most of what is available to readers reaches them through secondary outlets. Neither Tata Electronics nor the ministry has issued a detailed public statement setting out a revised node roadmap, so the account above rests on named spokespeople quoted in the press rather than on a formal disclosure. Readers should treat the exact sequencing and dates as the best current reporting, open to correction.

Two interpretive cautions are necessary. First, the December 2026 target was framed as the first chip rolling out, whereas mid-2028 refers to commercial operations. These are different milestones, so the size of the slip cannot be measured precisely. Second, trade commentary describing the change as a drop of two full process generations (TechTimes, 2026) reflects the distance between 28nm and 90nm as technology steps, and it does not by itself prove that the original plan was abandoned. What can be said with confidence is that the sequence of nodes, and the timeline attached to it, differ materially from the impression created in 2024.

Understanding Legacy Nodes

A process node, expressed in nanometres, is a generational label for a manufacturing technology. As a general rule, smaller nodes pack more transistors into a given area, which improves performance and energy efficiency but raises the cost and complexity of fabrication. The 28nm node occupies a distinctive position. Bloomberg's analysis, as relayed by TrendForce (2026), describes it as one of the most commercially significant mature nodes, used in smartphones, communications equipment, consumer electronics and, increasingly, vehicles. The 90nm node, by contrast, was first used for high-volume chips about two decades ago (AITimeline, 2026), and it serves lower-value segments such as industrial controls, power management and automotive microcontrollers.

The distance between the two nodes is not merely cosmetic. Moving from 90nm to 28nm requires more advanced lithography, tighter process control and a deeper pool of specialised engineers, and each of these capabilities is built through experience in production rather than acquired on paper. For this reason, the early months of a 90nm line are best understood as an apprenticeship. They train the people, qualify the suppliers and test the logistics on which a later 28nm line would depend.

It is worth being clear about what 90nm is not. It is not a failure state. Mature nodes underpin a very large portion of the chips found in cars, appliances and industrial machinery, and the supply disruptions of recent years demonstrated how damaging shortages of such unglamorous components can be. A domestic source of such chips has genuine value for supply security and for import substitution, a theme taken up by Business Standard (2026) in its assessment of whether the Tata fab can reduce India's import bill without being cutting-edge.

However, legacy nodes carry commercial limitations. Because the underlying technology is old and widely available, competition on price tends to be intense, and incumbents with long-depreciated equipment can sustain thin margins. A new entrant carrying a heavy capital burden starts at a disadvantage. Opening on 90nm therefore reduces technical risk while increasing financial pressure, because the plant must earn returns in a segment where margins are modest and where each quarter spent ramping production is a quarter in which more valuable 28nm demand is served elsewhere.

Rhetoric Versus Manufacturing Reality

Semiconductor fabrication is among the most demanding industrial activities attempted by any nation. A fab requires precision tools with long delivery lead times, ultra-pure materials and gases, stable power and water, and a workforce trained in process engineering that India has historically had little opportunity to develop domestically. Yield learning, the slow process of raising the share of working chips per wafer, cannot be shortcut by capital alone. Against that background, a schedule slip is unsurprising, and a sequenced ramp from mature nodes is arguably the norm.

What distinguishes the Dholera case is the contrast with the confidence of the public timeline. The government has described the sector in terms of national transformation, to become a top-five ecosystem by 2029 (DT Next, 2024). Official data present a more incremental picture. As of December 2025, ten ISM projects worth ₹1.60 lakh crore had been approved across six states, and the Union Budget for 2026 to 2027 provided ₹1,000 crore for the second phase of the mission, with emphasis on equipment, materials, intellectual property and training (PIB, 2026). These are meaningful commitments, yet they describe the building of an ecosystem over many years, not an imminent leap to the frontier.

The partnership structure explains part of the tension. PSMC provides design, construction support and technology access, while Tata Electronics must build the operating capability (DatacenterDynamics, n.d.). Transferring a process from one fab to another and reproducing its yields in a new country, with a new workforce and new suppliers, is a separate challenge from owning the licence. Tata's announcement of a strategic partnership with ASML in May 2026 (Tata Electronics, 2026) shows continued effort to build the supplier base, but also underlines that the ecosystem is still being assembled while the fab is under construction.

A Reasonable Start or a Quiet Retreat

The case for starting somewhere is strong. Beginning on 55nm and 90nm allows a new workforce to learn on forgiving technology, lets the plant secure early customers in automotive and industrial segments, and builds the yield record that later 28nm customers will demand. Commentary on the second phase of the mission has described a deliberate recalibration away from ambition-driven leaps towards a capability-led approach, prioritising mature technologies in the 28nm to 65nm range (Taipei Times, 2026). On this reading, the Dholera sequencing is consistent with national policy and arguably sensible.

The case for concern is equally serious. First, credibility is an asset in industrial policy. Prospective customers, suppliers and state governments plan around announced dates, and a visible gap between statement and delivery can weaken confidence in the next announcement. Second, timing matters in a market where the most commercially valuable mature node is 28nm. If the plant reaches that node only years after commercial operations begin, India may be entering a segment after its peak pricing has passed. Third, the capital is already committed. Public support of up to half of project cost (PIB, 2026) creates an obligation to demonstrate returns, and that obligation is harder to meet on a low-value node.

A fair judgement is that the strategy and the communication should be assessed separately. As strategy, a staged ascent from mature nodes is defensible and probably prudent. As communication, the emphasis on 28nm in 2024 invited expectations that the plan did not clearly support. Whether the episode is a retreat depends on what follows. Four indicators will be decisive: a published and dated timetable for 28nm production, disclosed customer commitments at 55nm and 90nm, credible yield data once trial production begins, and consistent public language from the company and the ministry about which milestone is being referred to.

The revision of Tata's Dholera plan is a modest episode in financial terms but a revealing one in policy terms. It shows that India's semiconductor journey is real, well funded and technically serious, and that it is also slower and more incremental than its most quoted slogans suggested. Starting on 90nm is not, in itself, a betrayal of the ambition to compete in advanced chipmaking. India has no realistic route to the leading edge without first mastering the fundamentals of high-volume fabrication.

The more important lesson concerns honesty about sequence. National missions of this kind are measured over decades, and public trust is best preserved by stating clearly which steps come first, which come later, and when. If Dholera delivers reliable 90nm output in 2028 and a firm path to 28nm, the episode will be remembered as a sensible beginning. If the dates continue to drift and the node roadmap remains vague, it will be remembered as the moment ambition and reality parted company. The facts that will decide between those outcomes have yet to emerge, and readers should watch the dated milestones rather than the slogans.

References:

  1. AITimeline. (2026). Tata Dholera fab 2024 to 2028, India's first chip plant. https://aitimeline.in
  2. Business Standard. (2026, July 23). Not cutting-edge, but can Tata's chip fab reduce India's import bill?
  3. DatacenterDynamics. (n.d.). Tata Electronics and PSMC to build India's first semiconductor fab. https://www.datacenterdynamics.com
  4. DT Next. (2024, March 14). First chip from Tata's Dholera plant to be out in Dec 2026, says Vaishnaw.
    https://www.pressreader.com
  5. Press Information Bureau. (2026, February). India Semiconductor Mission 2.0. Government of India. https://static.pib.gov.in
  6. Taipei Times. (2026, April 29). India Semiconductor Mission 2.0 [Editorial]. https://www.taipeitimes.com
  7. Tata Electronics. (n.d.). Semiconductor foundry. https://www.tataelectronics.com
  8. Tata Electronics. (2024a, February 29). Tata Group to build the nation's first fab in Dholera. https://www.tataelectronics.com
  9. Tata Electronics. (2024b, September 26). Tata Electronics and Powerchip Semiconductor Manufacturing Corporation (PSMC) complete landmark agreement for technology transfer to build India's first semiconductor fab. https://www.tataelectronics.com
  10. Tata Electronics. (2026, May 16). Tata Electronics and ASML announce strategic partnership to advance the semiconductor manufacturing ecosystem in India.
  11. TechTimes. (2026, July 17). India's first chip fab opens at 90nm, two process nodes below what Tata promised. https://www.techtimes.com
  12. TrendForce. (2026, July 20). Tata's India fab reportedly to launch at 90nm instead of 28nm; commercial production delayed to mid-2028. https://www.trendforce.com

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